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authorPratikkumar Prajapati <pratikkumar.v.prajapati@intel.com>2023-02-01 17:26:20 -0800
committerFelix Held <felix-coreboot@felixheld.de>2023-03-29 13:15:48 +0000
commit0a71e09cf9f6b971f3707644fbc7f2b6c396555b (patch)
treedbf221a006969735519f0cfefcf052bfbeb6f016 /src/soc/intel
parentf5f756d50743e7a23ab99d779bba98b5fec363cf (diff)
soc/intel/common: Add Intel Trace Hub driver
From Meteor Lake onwards Intel FSP will generate the Trace Hub related HOB if the Trace Hub is configured to save data in DRAM. This memory region is used by Trace Hub to store the traces for debugging purpose. This driver locates the HOB and marks the memory region reserved so that OS does not use it. Intel Trace Hub developer manual can be found via document #671536 on Intel's website. Change-Id: Ie5a348071b6c6a35e8be3efd1b2b658a991aed0e Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72722 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/common/block/tracehub/Kconfig9
-rw-r--r--src/soc/intel/common/block/tracehub/Makefile.inc2
-rw-r--r--src/soc/intel/common/block/tracehub/tracehub.c53
3 files changed, 64 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/tracehub/Kconfig b/src/soc/intel/common/block/tracehub/Kconfig
new file mode 100644
index 0000000000..76a01861a1
--- /dev/null
+++ b/src/soc/intel/common/block/tracehub/Kconfig
@@ -0,0 +1,9 @@
+config SOC_INTEL_COMMON_BLOCK_TRACEHUB
+ bool
+ default n
+ help
+ Enable Intel Trace Hub (TH) driver. Intel FSP reserves some portion of
+ memory for TH to store traces. This memory region information is
+ passed via FSP HOB to coreboot. This driver locates the HOB and marks
+ that memory region as reserved so that Operating System does not use
+ this memory.
diff --git a/src/soc/intel/common/block/tracehub/Makefile.inc b/src/soc/intel/common/block/tracehub/Makefile.inc
new file mode 100644
index 0000000000..aabed8767d
--- /dev/null
+++ b/src/soc/intel/common/block/tracehub/Makefile.inc
@@ -0,0 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TRACEHUB) += tracehub.c
diff --git a/src/soc/intel/common/block/tracehub/tracehub.c b/src/soc/intel/common/block/tracehub/tracehub.c
new file mode 100644
index 0000000000..dd065d5042
--- /dev/null
+++ b/src/soc/intel/common/block/tracehub/tracehub.c
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <fsp/util.h>
+
+static const uint8_t fsp_tracehub_guid[16] = {
+ 0x09, 0x59, 0xb3, 0x5f, 0x1c, 0x5a, 0x31, 0x4a,
+ 0xad, 0xaf, 0x57, 0x7b, 0x54, 0x68, 0x26, 0x3f,
+};
+
+static void tracehub_read_resources(struct device *dev)
+{
+ const struct hob_resource *tracehub_info_hob;
+
+ /* Read standard PCI resources. */
+ pci_dev_read_resources(dev);
+
+ /*
+ * Find the Trace Hub HOB generated by Intel FSP. If the Trace Hub
+ * is configured to save data in DRAM, FSP will generate this HOB.
+ * This HOB contains address and length of the memory region used
+ * by Trace Hub to save traces. Mark this memory region as reserved.
+ */
+ tracehub_info_hob = fsp_find_resource_hob_by_guid(fsp_tracehub_guid);
+ if (!tracehub_info_hob) {
+ printk(BIOS_INFO, "Trace Hub HOB not found\n");
+ return;
+ }
+ printk(BIOS_DEBUG, "Trace Hub HOB found: addr=0x%08llx length=0x%08llx\n",
+ tracehub_info_hob->addr, tracehub_info_hob->length);
+ reserved_ram_resource_kb(dev, 0, tracehub_info_hob->addr / KiB,
+ tracehub_info_hob->length / KiB);
+}
+
+static struct device_operations dev_ops = {
+ .read_resources = tracehub_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .ops_pci = &pci_dev_ops_pci,
+};
+
+static const unsigned short pci_device_ids[] = {
+ PCI_DID_INTEL_MTL_TRACEHUB,
+ 0
+};
+
+static const struct pci_driver tracehub_driver __pci_driver = {
+ .ops = &dev_ops,
+ .vendor = PCI_VID_INTEL,
+ .devices = pci_device_ids,
+};