diff options
author | Andrey Petrov <andrey.petrov@intel.com> | 2017-06-05 13:25:29 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-07-02 18:50:38 +0000 |
commit | 0405de978401760df45120600a3bc95c66ae3781 (patch) | |
tree | bd7bd436c9f55240f6933671d0cc81899972124c /src/soc/intel | |
parent | 99f50c7465cd6d75a1e5c6c4452136106092cf3c (diff) |
intel/block/cse: Add Cannon Lake SoC PCI device ID
Change-Id: Ida822d704b04cc4d1dfffb58003fc308bcb502d0
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/20064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/common/block/cse/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/common/block/cse/cse.c | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cse/Makefile.inc b/src/soc/intel/common/block/cse/Makefile.inc index fe7b13c7bb..376f00f715 100644 --- a/src/soc/intel/common/block/cse/Makefile.inc +++ b/src/soc/intel/common/block/cse/Makefile.inc @@ -1,2 +1,3 @@ +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 1346af4909..617684c0f0 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -468,6 +468,7 @@ static struct device_operations cse_ops = { static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_APL_CSE0, PCI_DEVICE_ID_INTEL_GLK_CSE0, + PCI_DEVICE_ID_INTEL_CNL_CSE0, 0, }; @@ -475,7 +476,7 @@ static const struct pci_driver cse_driver __pci_driver = { .ops = &cse_ops, .vendor = PCI_VENDOR_ID_INTEL, /* SoC/chipset needs to provide PCI device ID */ - .devices = pci_device_ids, + .devices = pci_device_ids }; #endif |