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| author | Felix Singer <felixsinger@posteo.net> | 2020-11-25 20:10:49 +0000 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-30 22:20:46 +0000 |
| commit | 3616e9c3b0806bd7f6a1960b658faec635d20dc4 (patch) | |
| tree | 4bc311600c5e1a246b60c245318d0774fe56c1c3 /src/soc/intel | |
| parent | 36c2ea4a630fee8607599baab7d8a9dcd2f9ca53 (diff) | |
soc/intel/skylake: Fix comment
mainboard_silicon_init_params() is *not* meant for configuring GPIOs. It
should only be used to configure FSP options, which can not be
configured elsewhere.
Change-Id: Ia92d0d173af9c67600e93b473480967304772998
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48008
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index ada06f217d..3eb72fa57a 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -434,7 +434,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) soc_irq_settings(params); } -/* Mainboard GPIO Configuration */ +/* Mainboard FSP Configuration */ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params) { printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); |