From 3616e9c3b0806bd7f6a1960b658faec635d20dc4 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Wed, 25 Nov 2020 20:10:49 +0000 Subject: soc/intel/skylake: Fix comment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mainboard_silicon_init_params() is *not* meant for configuring GPIOs. It should only be used to configure FSP options, which can not be configured elsewhere. Change-Id: Ia92d0d173af9c67600e93b473480967304772998 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/48008 Reviewed-by: Michael Niewöhner Reviewed-by: Arthur Heymans Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/chip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index ada06f217d..3eb72fa57a 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -434,7 +434,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) soc_irq_settings(params); } -/* Mainboard GPIO Configuration */ +/* Mainboard FSP Configuration */ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params) { printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); -- cgit v1.2.3