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authorAngel Pons <th3fanbus@gmail.com>2022-05-02 16:58:39 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-04 13:11:21 +0000
commit623e2b351c80d2086af3e9dbd523dd6e9d06339b (patch)
tree4c497f00b7e1fdf7bcc2e8cae0f3e67f78200206 /src/soc/intel
parentf0ed846cfce843965f191e56ba01b35d8c9195b0 (diff)
mb/ocp, soc/intel/xeon_sp: Use common ASL POST defines
Use common ASL defines for POST code handling. Change-Id: I5b4c11860a8c33e56edaea0f6de378cbaa63a8c5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63989 Reviewed-by: Jonathan Zhang <jonzhang@fb.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/xeon_sp/acpi/iiostack.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/acpi/iiostack.asl b/src/soc/intel/xeon_sp/acpi/iiostack.asl
index 4b2b65bbc5..73f9937e01 100644
--- a/src/soc/intel/xeon_sp/acpi/iiostack.asl
+++ b/src/soc/intel/xeon_sp/acpi/iiostack.asl
@@ -58,7 +58,7 @@
{ \
/* indicate unrecognized UUID */ \
CDW1 |= 0x04 \
- IO80 = 0xEE \
+ DBG0 = 0xEE \
Return (Arg3) \
} \
} \