From 623e2b351c80d2086af3e9dbd523dd6e9d06339b Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Mon, 2 May 2022 16:58:39 +0200
Subject: mb/ocp, soc/intel/xeon_sp: Use common ASL POST defines

Use common ASL defines for POST code handling.

Change-Id: I5b4c11860a8c33e56edaea0f6de378cbaa63a8c5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63989
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/xeon_sp/acpi/iiostack.asl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/soc/intel')

diff --git a/src/soc/intel/xeon_sp/acpi/iiostack.asl b/src/soc/intel/xeon_sp/acpi/iiostack.asl
index 4b2b65bbc5..73f9937e01 100644
--- a/src/soc/intel/xeon_sp/acpi/iiostack.asl
+++ b/src/soc/intel/xeon_sp/acpi/iiostack.asl
@@ -58,7 +58,7 @@
 			{							\
 				/* indicate unrecognized UUID */		\
 				CDW1 |= 0x04					\
-				IO80 = 0xEE					\
+				DBG0 = 0xEE					\
 				Return (Arg3)					\
 			}							\
 		}								\
-- 
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