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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-01 13:33:50 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-04 09:41:38 +0000
commita8da35440bc2d6bc7c7e859a7d404917762ff13c (patch)
treea715a8f231af60153f3e3f38e5ed24645faf68e4 /src/soc/intel
parent8ded4ce1aa039603ecf62227a70a53cb53e3932f (diff)
src/soc/intel/cannonlake: Fix IA32_PLATFORM_DCA_CAP address
Change-Id: Id4f99e82bb97a260d654b49a2ba94fde207d318b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28847 Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/cannonlake/include/soc/msr.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/msr.h b/src/soc/intel/cannonlake/include/soc/msr.h
index 6617d7fa53..c63c921827 100644
--- a/src/soc/intel/cannonlake/include/soc/msr.h
+++ b/src/soc/intel/cannonlake/include/soc/msr.h
@@ -26,7 +26,7 @@
#define ENERGY_POLICY_NORMAL 6
#define ENERGY_POLICY_POWERSAVE 15
#define IA32_PACKAGE_THERM_INTERRUPT 0x1b2
-#define IA32_PLATFORM_DCA_CAP 0x1f9
+#define IA32_PLATFORM_DCA_CAP 0x1f8
#define MSR_VR_MISC_CONFIG2 0x636
#endif