From a8da35440bc2d6bc7c7e859a7d404917762ff13c Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Mon, 1 Oct 2018 13:33:50 +0200
Subject: src/soc/intel/cannonlake: Fix IA32_PLATFORM_DCA_CAP address

Change-Id: Id4f99e82bb97a260d654b49a2ba94fde207d318b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28847
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/cannonlake/include/soc/msr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/soc/intel')

diff --git a/src/soc/intel/cannonlake/include/soc/msr.h b/src/soc/intel/cannonlake/include/soc/msr.h
index 6617d7fa53..c63c921827 100644
--- a/src/soc/intel/cannonlake/include/soc/msr.h
+++ b/src/soc/intel/cannonlake/include/soc/msr.h
@@ -26,7 +26,7 @@
 #define  ENERGY_POLICY_NORMAL		6
 #define  ENERGY_POLICY_POWERSAVE	15
 #define IA32_PACKAGE_THERM_INTERRUPT	0x1b2
-#define IA32_PLATFORM_DCA_CAP		0x1f9
+#define IA32_PLATFORM_DCA_CAP		0x1f8
 #define MSR_VR_MISC_CONFIG2		0x636
 
 #endif
-- 
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