diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-02-18 00:44:15 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-29 13:56:04 +0000 |
| commit | af27ac26b34216f4a188ee1738825177d469cf48 (patch) | |
| tree | cf6f519b0f7379aaa6b6b058d400d951496b9c1e /src/soc/intel/xeon_sp | |
| parent | d58580e0032f855b290815ed412a9d77c66f759e (diff) | |
soc/intel: Move `pmc_clear_pmcon_sts()` into IA common code
This patch moves `pmc_clear_pmcon_sts` function into common code and
remove SoC specific instances.
Accessing PMC GEN_PMCON_A register differs between different Intel
chipsets. Typically, there are two possible ways to perform GEN_PMCON_A
register programming (like `pmc_clear_pmcon_sts()`) as:
1. Using PCI configuration space when GEN_PMCON_A is a PCI configuration
register.
2. Using MMIO access when GEN_PMCON_A is a memory mapped register.
SoC users to select `SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION` Kconfig to
perform GEN_PMCON_A register programming using PMC MMIO.
BUG=b:211954778
TEST=Able to build brya.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I8d15f421c128630f928a1b6a7e2840056d68d7b1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeff Daly <jeffd@silicom-usa.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/xeon_sp')
| -rw-r--r-- | src/soc/intel/xeon_sp/include/soc/pm.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/pmutil.c | 15 |
2 files changed, 0 insertions, 18 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/pm.h b/src/soc/intel/xeon_sp/include/soc/pm.h index 63b15cd0de..b4d6df987e 100644 --- a/src/soc/intel/xeon_sp/include/soc/pm.h +++ b/src/soc/intel/xeon_sp/include/soc/pm.h @@ -121,7 +121,4 @@ uint16_t get_pmbase(void); void pmc_lock_smi(void); -/* Clear PMCON status bits */ -void pmc_clear_pmcon_sts(void); - #endif diff --git a/src/soc/intel/xeon_sp/pmutil.c b/src/soc/intel/xeon_sp/pmutil.c index 14c7da83b9..c63285c69b 100644 --- a/src/soc/intel/xeon_sp/pmutil.c +++ b/src/soc/intel/xeon_sp/pmutil.c @@ -179,18 +179,3 @@ void pmc_soc_set_afterg3_en(const bool on) reg8 |= SLEEP_AFTER_POWER_FAIL; pci_write_config8(PCH_DEV_PMC, GEN_PMCON_B, reg8); } - -void pmc_clear_pmcon_sts(void) -{ - uint32_t reg_val; - const pci_devfn_t dev = PCH_DEV_PMC; - - reg_val = pci_read_config32(dev, GEN_PMCON_A); - /* - * Clear SUS_PWR_FLR, GBL_RST_STS, HOST_RST_STS, PWR_FLR bits - * while retaining MS4V write-1-to-clear bit - */ - reg_val &= ~(MS4V); - - pci_write_config32(dev, GEN_PMCON_A, reg_val); -} |