summaryrefslogtreecommitdiff
path: root/src/soc/intel/xeon_sp
diff options
context:
space:
mode:
authorKangheui Won <khwon@chromium.org>2020-09-17 17:04:12 +1000
committerAaron Durbin <adurbin@chromium.org>2020-11-02 22:17:37 +0000
commit1464b0edeac0581af837f90680f0bf05364a8b2f (patch)
treee5c226e2e2f2e2e55c527197ee473488a6ea7692 /src/soc/intel/xeon_sp
parent9f7df5c18a426947e173277a294537d7534eef48 (diff)
soc/amd/picasso: pass verstage timestamps to x86
Initialize timestamp table with data from psp_verstage on bootblock. PSP keeps its own timestamp and pass it in transfer_buffer. However PSP timestamp and TSC may be out of sync so we can't just merge two tables without modification. info->timestamp contains PSP's clock value (in us) when x86 processor released and base_timestamp contains TSC value when bootblock is started. The time between x86 release and bootblock entry should be very short so we can think those two happened at the same time and use them for sync. In some cases there will be underflow in timestamp entries but cbmem utility can handle wrap-over in entries. Few timestamp values including 1st timestamp can be very large but we can still get the time spent on boot without any problem. BUG=b:159220781, b:167148121, b:171422583 BRANCH=zork TEST=boot to kernel, run 'cbmem -t' and check verstage timestamps are included in the result. Change-Id: I5e89bb54f478153fb40ba51b5ab61fa20af3b99a Signed-off-by: Kangheui Won <khwon@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45059 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp')
0 files changed, 0 insertions, 0 deletions