diff options
| author | Shuo Liu <shuo.liu@intel.com> | 2024-03-11 07:14:07 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-03-30 13:38:18 +0000 |
| commit | ec58bebbd6dd6f4b7535948e55cd9241fac4378f (patch) | |
| tree | f39fa4bf43fdade7820a4ad15ba2c76f33109180 /src/soc/intel/xeon_sp/spr | |
| parent | f7e456748f90bdf2798c09bfaa23b5e17de43d0d (diff) | |
soc/intel/xeon_sp: Unshare Xeon-SP chip common codes
GraniteRapids (6th Gen Xeon-SP) FSP contains changes in IIO stack
descriptors impacting the way of coreboot's creation of domains.
Separates the codes as preparation for 6th Gen and later platforms.
Change-Id: Iab6acaa5e5c090c8d821bd7c2d3e0e0ad7486bdc
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81312
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/spr')
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/Makefile.mk | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/ioat.c | 8 |
2 files changed, 5 insertions, 4 deletions
diff --git a/src/soc/intel/xeon_sp/spr/Makefile.mk b/src/soc/intel/xeon_sp/spr/Makefile.mk index d999f30661..d288df6fe6 100644 --- a/src/soc/intel/xeon_sp/spr/Makefile.mk +++ b/src/soc/intel/xeon_sp/spr/Makefile.mk @@ -14,6 +14,7 @@ romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c reset.c ramstage-y += crashlog.c ioat.c +ramstage-y += ../chip_gen1.c ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/spr/include -I$(src)/soc/intel/xeon_sp/spr diff --git a/src/soc/intel/xeon_sp/spr/ioat.c b/src/soc/intel/xeon_sp/spr/ioat.c index cdf98347f6..ecfc1f730b 100644 --- a/src/soc/intel/xeon_sp/spr/ioat.c +++ b/src/soc/intel/xeon_sp/spr/ioat.c @@ -79,10 +79,10 @@ static void create_ioat_domain(const union xeon_domain_path dp, struct bus *cons } } -void soc_create_ioat_domains(const union xeon_domain_path path, - struct bus *const bus, - const STACK_RES *const sr, - const size_t pci_segment_group) +void create_ioat_domains(const union xeon_domain_path path, + struct bus *const bus, + const STACK_RES *const sr, + const size_t pci_segment_group) { if (sr->BusLimit < sr->BusBase + HQM_BUS_OFFSET + HQM_RESERVED_BUS) { printk(BIOS_WARNING, |