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authorFelix Held <felix-coreboot@felixheld.de>2023-06-05 19:30:23 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-07-20 13:10:41 +0000
commit97439ecc0178a0935d50a4b3a1774027ae7bebbf (patch)
tree32ed908f133387ee6699a161225cb21bf8a22545 /src/soc/intel/xeon_sp/spr
parent8193eabd8df2ba4760e425ca6946983808a64301 (diff)
soc/intel/xeon_sp: use VGA_MMIO_* defines from arch/vga.h
Now that we have x86 architecture specific VGA_MMIO_* defines in arch/vga.h, use those instead of having SoC-specific defines for this. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I77b914d563bdc83e7fad7d7fccd5cf7777cb4918 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75669 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/spr')
-rw-r--r--src/soc/intel/xeon_sp/spr/soc_acpi.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/xeon_sp/spr/soc_acpi.c b/src/soc/intel/xeon_sp/spr/soc_acpi.c
index 2b820f123c..933cb97e8d 100644
--- a/src/soc/intel/xeon_sp/spr/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/spr/soc_acpi.c
@@ -2,6 +2,7 @@
#include <acpi/acpigen.h>
#include <arch/smp/mpspec.h>
+#include <arch/vga.h>
#include <assert.h>
#include <cbmem.h>
#include <cpu/intel/turbo.h>
@@ -131,9 +132,8 @@ static void create_dsdt_iou_pci_resource(uint8_t socket, uint8_t stack, const ST
/* Additional Mem32 resources on socket 0 bus 0 */
if (socket == 0 && stack == 0) {
- acpigen_resource_dword(0, 0xc, 3, 0, VGA_BASE_ADDRESS,
- (VGA_BASE_ADDRESS + VGA_BASE_SIZE - 1), 0x0,
- VGA_BASE_SIZE);
+ acpigen_resource_dword(0, 0xc, 3, 0, VGA_MMIO_BASE,
+ VGA_MMIO_LIMIT, 0x0, VGA_MMIO_SIZE);
acpigen_resource_dword(0, 0xc, 1, 0, SPI_BASE_ADDRESS,
(SPI_BASE_ADDRESS + SPI_BASE_SIZE - 1), 0x0,
SPI_BASE_SIZE);