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authorShuo Liu <shuo.liu@intel.com>2024-03-27 04:52:37 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-05-28 09:47:35 +0000
commit70de5bf9fdfeb33dfc717512e400b56ab02b165d (patch)
treee68fbbe6bf7c2547dc1623948564f004abdc55de /src/soc/intel/xeon_sp/spr
parentbd33b6ab9fde904dd8a532ce20e8a6331ba8dafb (diff)
soc/intel/xeon_sp: Add PD_TYPE_CLUSTER
Add a new proximity type to represent the sub-NUMA cluster (SNC). This patch adds necessary Xeon-SP common code level support for SNC support. When SNC on, each SNC cluster will have a proximity domain. DIMMs and CPU cores are attached to SNC proximity domains instead of the processor proximity domains. With SNC, there are 3 types of proximity domains, PD_TYPE_PROCESSOR, PD_TYPE_GENERIC_INITIATOR and PD_TYPE_CLUSTER. proximity domain type checks in Xeon-SP codes are updated to correctly handle the adding of the new type. This patch doesn't actually enable SNC. To fully enable SNC, SoC codes need to override soc_get_cluster_count(), soc_set_cpu_node_ id() and memory_to_pd(), and call soc_set_cpu_node_id() in its per-CPU init routine. Change-Id: I32558983780f302ff4893901540a90baebf47add Signed-off-by: Shuo Liu <shuo.liu@intel.com> Co-authored-by: Ziang Wang <ziang.wang@intel.com> Co-authored-by: Gang Chen <gang.c.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81443 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/spr')
-rw-r--r--src/soc/intel/xeon_sp/spr/chip.c2
-rw-r--r--src/soc/intel/xeon_sp/spr/soc_util.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/xeon_sp/spr/chip.c b/src/soc/intel/xeon_sp/spr/chip.c
index 1eab917284..e179df0e15 100644
--- a/src/soc/intel/xeon_sp/spr/chip.c
+++ b/src/soc/intel/xeon_sp/spr/chip.c
@@ -176,7 +176,7 @@ static void rcec_init(struct device *dev)
uint32_t ep_bus;
uint8_t i;
for (i = 0; i < pds.num_pds; i++) {
- if (pds.pds[i].pd_type == PD_TYPE_PROCESSOR)
+ if (pds.pds[i].pd_type != PD_TYPE_GENERIC_INITIATOR)
continue;
ep_bus = PCI_BDF(pds.pds[i].dev) >> 20;
if (ep_bus == ecrc_bus + 1)
diff --git a/src/soc/intel/xeon_sp/spr/soc_util.c b/src/soc/intel/xeon_sp/spr/soc_util.c
index 17addfc75c..584532785e 100644
--- a/src/soc/intel/xeon_sp/spr/soc_util.c
+++ b/src/soc/intel/xeon_sp/spr/soc_util.c
@@ -94,7 +94,7 @@ bool is_iio_cxl_stack_res(const STACK_RES *res)
assert(pds.num_pds);
for (uint8_t i = 0; i < pds.num_pds; i++) {
- if (pds.pds[i].pd_type == PD_TYPE_PROCESSOR)
+ if (pds.pds[i].pd_type != PD_TYPE_GENERIC_INITIATOR)
continue;
uint32_t bus = PCI_BDF(pds.pds[i].dev) >> 20;