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authorDuncan Laurie <dlaurie@google.com>2020-08-28 19:44:42 +0000
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-10-14 02:55:35 +0000
commit6f58b991de606e0a1faa8b7da626eda5e8d73909 (patch)
tree70c5e0923aba35fabe7eca54f8ae0dcad36a4c7c /src/soc/intel/xeon_sp/spi.c
parentce3a9740f1b753b20c7a09f215d8ff21cc91646e (diff)
soc/intel/tigerlake: Enable and use USB4 PCIe driver
This change enables the USB4/Thunderbolt common layer for Intel SOC, and enables the Intel USB4 PCIe driver. This moves the _DSD variables from the DSDT into the SSDT and allows them to be configured for each board if necessary. Change-Id: I2564512d951046e015c148db42fdaf2d4b8b81dd Signed-off-by: Duncan Laurie <dlaurie@google.com> Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44917 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/spi.c')
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