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authorPatrick Rudolph <patrick.rudolph@9elements.com>2024-01-18 07:57:07 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2024-01-31 17:04:33 +0000
commit15672599e411bb39b9f63b8fc2fb8233f3c62ece (patch)
treea2f03ad3d9e28c8898d5a97719acde40dd61e15f /src/soc/intel/xeon_sp/skx
parent789adfabb722cec627d29c6320c996de44169f86 (diff)
soc/intel/xeon_sp: Attach UBOX stacks
Attach UBOX stacks on newer generation Xeon-SP. In order to use PCI drivers for UBOX devices, locating UBOX devices by vendor and device IDs and replacing device access by specifying S:B:D:F numbers, add a PCI domain for the UBOX stacks and let the PCI enumerator index all devices. Since there are no PCI BARs on the UBOX bus the PCI locator doesn't have to assign resources on those buses. Once all PCI devices on the UBOX stack can be located without knowing their UBOX bus number and PCI segment the Xeon-SP code can fully enable the multi PCI segment group support. Test: ibm/sbp1 (4S) is able to find all PCU devices by PCI ID. Change-Id: I8f9d52dd117364a42de1c73d39cc86dafeaf2678 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80091 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/skx')
-rw-r--r--src/soc/intel/xeon_sp/skx/soc_util.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/skx/soc_util.c b/src/soc/intel/xeon_sp/skx/soc_util.c
index a5db8fd309..3e0299956f 100644
--- a/src/soc/intel/xeon_sp/skx/soc_util.c
+++ b/src/soc/intel/xeon_sp/skx/soc_util.c
@@ -59,6 +59,29 @@ bool is_pcie_iio_stack_res(const STACK_RES *res)
return res->BusBase < res->BusLimit;
}
+bool is_ubox_stack_res(const STACK_RES *res)
+{
+ /*
+ * Unlike on later platforms there's no separate "UBOX" stack.
+ *
+ * The UBOX devices can always be found on the first bus on the stack IIO0 (CSTACK).
+ * This bus is also referred to as uncore bus 0 or B(30).
+ * It has at a fixed address the UBOX:
+ * B(30):8.0 8086:2014
+ * B(30):8.1 8086:2015
+ * B(30):8.2 8086:2016
+ *
+ * The PCU devices can always be on the first bus of the stack IIO1 (PSTACK).
+ * This bus is also referred to as uncore bus 1 or B(31).
+ * It has at a fixed address the PCU:
+ * B(31):30.0 8086:2080
+ * B(31):30.1 8086:2081
+ * B(31):30.2 8086:2082
+ */
+
+ return false;
+}
+
uint8_t get_stack_busno(const uint8_t stack)
{
if (stack >= MAX_IIO_STACK) {