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| author | Arthur Heymans <arthur@aheymans.xyz> | 2024-02-02 17:37:42 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-28 12:12:59 +0000 |
| commit | 3cfcffe49c720bd5152d3a26ec744adbc4f12477 (patch) | |
| tree | 3b454ac7b4c48097bcd4c82dbe70822a2dfe7970 /src/soc/intel/xeon_sp/pch.c | |
| parent | f45fcd1cf3ff801816ea5462a0f0f3208a585c3a (diff) | |
cpu/x86/(sipi|smm): Pass on CR3 from ramstage
To allow for more flexibility like generating page tables at runtime or
page tables that are part of the ramstage, add a parameter to
sipi_vector.S and smm_stub.S so that APs use the same page tables as the
BSP during their initialization.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I1250ea6f63c65228178ee66e06d988dadfcc2a37
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80335
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/pch.c')
0 files changed, 0 insertions, 0 deletions