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authorMichał Żygowski <michal.zygowski@3mdeb.com>2023-01-18 13:37:28 +0100
committerMichał Żygowski <michal.zygowski@3mdeb.com>2023-06-15 13:58:44 +0000
commitc68456ee4b03051f24de3cf57cdb8e0ea1be99fb (patch)
treeb852ca9477fe3d5b4803ad12e119936fc522e1e5 /src/soc/intel/xeon_sp/lbg/include
parent0d28b978e51b5c4c7b3a5a9fc8b20f1fd06690c7 (diff)
soc/intel/apollolake: Select PERIODIC_SMI_RATE_SELECTION_IN_GEN_PMCON_B
Certain chipsets/SoCs like Apollo Lake use GEN_PMCON_B for periodic SMI rate selection unlike other chipsets which use GEN_PMCON_A. Select PERIODIC_SMI_RATE_SELECTION_IN_GEN_PMCON_B to indicate the register difference. Based on Apollo Lake datasheet Vol. 3 Revision 005: https://cdrdv2.intel.com/v1/dl/getContent/334819 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: If182e1285ad6bd3f7c54760440010c50f57f7013 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72072 Reviewed-by: Sean Rhodes <sean@starlabs.systems> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/lbg/include')
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