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authorRocky Phagura <rphagura@fb.com>2021-04-03 08:49:32 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-06-04 12:38:32 +0000
commitd4db36e672644ac7f528d12c5ce3539725456085 (patch)
tree54887ccb33b3d62df2a684613006da4275c46d16 /src/soc/intel/xeon_sp/include
parent3bfa1bde60dc3197c27f60ed7b25f9cbdbd3c4bb (diff)
src/intel/xeon_sp: add hardware error support (HEST)
This patch adds the ACPI hardware error source table (HEST) support. This involves a few different parts: (1) The ACPI HEST table which is filled with the appropriate fields (2) Reserved memory which is used by runtime SW to provide error information. OS will not accept a HEST table with this memory set to 0. The ASL code to enable APEI bit will be submitted in a separate patch. Tested on DeltaLake mainboard with following options enabled SOC_INTEL_XEON_RAS After boot to Linux, the following will show in dmesg: HEST: Table parsing has been initialized Change-Id: If76b2af153616182cc053ca878f30fe056e9c8bd Signed-off-by: Rocky Phagura <rphagura@fb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52090 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/xeon_sp/include')
-rw-r--r--src/soc/intel/xeon_sp/include/soc/hest.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/hest.h b/src/soc/intel/xeon_sp/include/soc/hest.h
new file mode 100644
index 0000000000..ad79d45fdf
--- /dev/null
+++ b/src/soc/intel/xeon_sp/include/soc/hest.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef _HEST_H_
+#define _HEST_H_
+#include <acpi/acpi.h>
+
+#define MCE_ERR_POLL_MS_INTERVAL 1000
+#define HEST_PCIE_RP_AER_DESC_TYPE 6
+#define HEST_GHES_DESC_TYPE 9
+#define GHES_MAX_RAW_DATA_LENGTH (((CONFIG_ERROR_LOG_BUFFER_SIZE) >> 1) - 8)
+#define GHEST_ERROR_STATUS_BLOCK_LENGTH ((CONFIG_ERROR_LOG_BUFFER_SIZE) >> 1)
+#define GHEST_ASSIST (1 << 2)
+#define FIRMWARE_FIRST (1 << 0)
+#define MEM_VALID_BITS 0x66ff
+#define PCIE_VALID_BITS 0xef
+#define QWORD_ACCESS 4
+#define NOTIFY_TYPE_SCI 3
+
+/* Generic Error Source Descriptor */
+typedef struct acpi_ghes_esd {
+ u16 type;
+ u16 source_id;
+ u16 related_src_id;
+ u8 flags;
+ u8 enabled;
+ u32 prealloc_erecords;
+ u32 max_section_per_record;
+} __packed acpi_ghes_esd_t;
+
+typedef struct ghes_record {
+ acpi_ghes_esd_t esd;
+ u32 max_raw_data_length;
+ acpi_addr64_t sts_addr;
+ acpi_hest_hen_t notify;
+ u32 err_sts_blk_len;
+} __packed ghes_record_t;
+
+unsigned long hest_create(unsigned long current, struct acpi_rsdp *rsdp);
+
+#endif