diff options
author | Jonathan Zhang <jonzhang@fb.com> | 2020-09-14 13:37:53 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-21 08:06:09 +0000 |
commit | bb25c59e90110f601291a281a5df8a70714399dc (patch) | |
tree | 7f96bc08f08c3d20785306bef93aa9a911324374 /src/soc/intel/xeon_sp/include | |
parent | 3bfd3cfdeea372c593d8cb893941ff392a6582c0 (diff) |
soc/intel/xeon_sp/cpx: search IIO_UDS HOB once when creating DMAR table
IIO_UDS HOB was searched several times during the creation of DMAR table.
Reduce it to only once to improve boot time.
Both DRHD and ATSR subtable creations involve addition of PCIe bridge
device entries, combine the functions with
acpi_create_dmar_ds_pci_br_for_port().
When looping through ports to create PCIe bridge device entries,
use MAX_PORTS intead of NUMBER_PORTS_PER_SOCKET to improve boot time.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I469cd8473c50e105daeda6c5607592ae7cef6032
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/include')
0 files changed, 0 insertions, 0 deletions