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authorMichael Niewöhner <foss@mniewoehner.de>2021-10-04 16:59:49 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2021-10-13 18:05:05 +0000
commit2353cd9936702c6e556a9f810f180eced1e113d9 (patch)
tree6b753a7a60bd1bcca7439287e63569f8a352ce05 /src/soc/intel/xeon_sp/include
parent51254ee9397a535f5e51d9b12702b1a385e40f0e (diff)
soc/intel: drop P_BLK support
P_BLK is legacy and superseded by ACPI _CST. Also, the implementation for most platforms in soc/intel is broken. Thus, drop it. For APL the IO redirection is kept since it's used as replacement for the broken MWAIT instructions. Change-Id: I489aa7886dd9a4c1e6c12542bc2a1feba245ec36 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58096 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/xeon_sp/include')
-rw-r--r--src/soc/intel/xeon_sp/include/soc/msr.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/msr.h b/src/soc/intel/xeon_sp/include/soc/msr.h
index 3d68bf2565..9a8b641b49 100644
--- a/src/soc/intel/xeon_sp/include/soc/msr.h
+++ b/src/soc/intel/xeon_sp/include/soc/msr.h
@@ -28,18 +28,9 @@
/* No package C-state limit. All C-States supported by the processor are available. */
#define PKG_CSTATE_LIMIT_MASK (0xf << PKG_CSTATE_LIMIT_SHIFT)
#define PKG_CSTATE_NO_LIMIT (0x7 << PKG_CSTATE_LIMIT_SHIFT)
-#define IO_MWAIT_REDIRECTION_SHIFT 10
-#define IO_MWAIT_REDIRECTION_ENABLE (1 << IO_MWAIT_REDIRECTION_SHIFT)
#define CFG_LOCK_SHIFT 15
#define CFG_LOCK_ENABLE (1 << CFG_LOCK_SHIFT)
-/* MSR_PMG_IO_CAPTURE_BASE bits */
-#define MSR_PMG_IO_CAPTURE_BASE 0xe4
-#define LVL_2_BASE_ADDRESS_SHIFT 0 /* 15:0 bits */
-#define LVL_2_BASE_ADDRESS (0x0514 << LVL_2_BASE_ADDRESS_SHIFT)
-#define CST_RANGE_SHIFT 16 /* 18:16 bits */
-#define CST_RANGE_MAX_C6 (0x1 << CST_RANGE_SHIFT)
-
/* MSR_POWER_CTL bits */
#define MSR_POWER_CTL 0x1fc
#define BIDIR_PROCHOT_ENABLE_SHIFT 0