diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2023-01-23 09:51:18 +0000 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-01-23 13:26:33 +0000 |
| commit | 141a1772cac7be67fd007377f567a8b356d5c6c1 (patch) | |
| tree | 0086f3a7a5f9e507e3175a64f656312050aa8e57 /src/soc/intel/xeon_sp/include | |
| parent | 0f9508638d245b303ef0bca217628b9f902eeaab (diff) | |
Revert "soc/intel/xeon_sp: Enable FSP_ERROR_INFO_HOB handling"
This reverts commit 80b1fa33.
Reason for revert:
"Error: CONFIG() used on unknown value (ENABLE_FSP_ERROR_INFO) at src/soc/intel/xeon_sp/romstage.c:20"
Change-Id: I843322fc9d7ebbc30e9209ae933313f2668bfa40
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71287
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/xeon_sp/include')
| -rw-r--r-- | src/soc/intel/xeon_sp/include/soc/romstage.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/romstage.h b/src/soc/intel/xeon_sp/include/soc/romstage.h index 10d334ff4d..a2adfed918 100644 --- a/src/soc/intel/xeon_sp/include/soc/romstage.h +++ b/src/soc/intel/xeon_sp/include/soc/romstage.h @@ -10,6 +10,5 @@ void mainboard_memory_init_params(FSPM_UPD * mupd); void mainboard_rtc_failed(void); void save_dimm_info(void); void mainboard_ewl_check(void); -void fsp_check_for_error(void); #endif /* _SOC_ROMSTAGE_H_ */ |