diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-12 21:17:56 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-20 10:18:46 +0000 |
| commit | 3d802535cbf222d403e0d7d5cc6632546333a4c4 (patch) | |
| tree | d81070cb4e983a44e790481e22d1746b699d0a22 /src/soc/intel/xeon_sp/include | |
| parent | 6e425e1275a7638eb4b42b4fdec23f5674d086f5 (diff) | |
soc/intel/xeon_sp: Set coreboot defined IOAPIC and HPET BDF
Don't rely on the FSP-S setting the HPET and IOAPIC BDF. This makes
coreboot in control of these settings.
Change-Id: I937ebf05533019cb1a2be771ef3b9193a458dddf
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47537
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/include')
| -rw-r--r-- | src/soc/intel/xeon_sp/include/soc/pch.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/pch.h b/src/soc/intel/xeon_sp/include/soc/pch.h index 84d5e4896b..0be14ae966 100644 --- a/src/soc/intel/xeon_sp/include/soc/pch.h +++ b/src/soc/intel/xeon_sp/include/soc/pch.h @@ -9,4 +9,6 @@ void pch_disable_devfn(struct device *dev); #endif +void override_hpet_ioapic_bdf(void); + #endif /* _SOC_PCH_H_ */ |