From 3d802535cbf222d403e0d7d5cc6632546333a4c4 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 12 Nov 2020 21:17:56 +0100 Subject: soc/intel/xeon_sp: Set coreboot defined IOAPIC and HPET BDF Don't rely on the FSP-S setting the HPET and IOAPIC BDF. This makes coreboot in control of these settings. Change-Id: I937ebf05533019cb1a2be771ef3b9193a458dddf Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/47537 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/soc/intel/xeon_sp/include/soc/pch.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/xeon_sp/include') diff --git a/src/soc/intel/xeon_sp/include/soc/pch.h b/src/soc/intel/xeon_sp/include/soc/pch.h index 84d5e4896b..0be14ae966 100644 --- a/src/soc/intel/xeon_sp/include/soc/pch.h +++ b/src/soc/intel/xeon_sp/include/soc/pch.h @@ -9,4 +9,6 @@ void pch_disable_devfn(struct device *dev); #endif +void override_hpet_ioapic_bdf(void); + #endif /* _SOC_PCH_H_ */ -- cgit v1.2.3