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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2021-01-14 01:37:26 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-19 09:03:00 +0000 |
| commit | 91a4512adfe37438b193c3c982e06ec21f75edc4 (patch) | |
| tree | 6dc8826397fcde39d4a72131cc30094cdb4b5876 /src/soc/intel/xeon_sp/cpx | |
| parent | 0c094aeb0e214b2abcef9a15ab23b1669a20d80e (diff) | |
intel/xeon_sp, mb/ocp/deltalake: Rework get_stack_busnos()
- Return the busno based on the stack number.
- Replace pci_mmio_read_config32 with pci_io_read_config32 to get the
register value before mapping the MMIOCFG space.
- Remove the plural `s` as the function now provides one bus number.
Change-Id: I6e78e31b8ab89b1bdcfdeffae2e193e698385186
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h index 95290f2f55..848cb48fbb 100644 --- a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h +++ b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h @@ -53,6 +53,7 @@ #define UBOX_DECS_DEV 8 #define UBOX_DECS_FUNC 2 #define UBOX_DECS_CPUBUSNO_CSR 0xcc +#define UBOX_DECS_CPUBUSNO1_CSR 0xd0 #define VTD_TOLM_CSR 0xd0 #define VTD_TSEG_BASE_CSR 0xa8 |