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authorMarc Jones <marcjones@sysproconsulting.com>2021-03-11 14:49:19 -0700
committerMarc Jones <marc@marcjonesconsulting.com>2021-03-20 16:48:24 +0000
commit52e14f78ba43ebd66e9de26eef1c03011ff7c778 (patch)
treec52a3af0e5b657dcd49e1d5230ae28675446387b /src/soc/intel/xeon_sp/cpx
parentf332e47f5696335de2167b6163de0cdbfe63df92 (diff)
soc/intel/xeon_sp/: Fix SMI_LOCK setting
Move the SMI_LOCK to post SMM setup. Also, use the correct access method for SMI_LOCK. GEN_PMCON_A is in PCI config space and not in MMIO space on this PCH. Change-Id: Ibbb183ef61ca7330198c1243ecfc2d4df51e652b Signed-off-by: Marc Jones <marcjones@sysproconsulting.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51452 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx')
-rw-r--r--src/soc/intel/xeon_sp/cpx/cpu.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c
index b3ab236faf..339bf09aa2 100644
--- a/src/soc/intel/xeon_sp/cpx/cpu.c
+++ b/src/soc/intel/xeon_sp/cpx/cpu.c
@@ -16,8 +16,10 @@
#include <cpu/x86/mtrr.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/mp_init.h>
+#include <intelpch/lockdown.h>
#include <soc/cpu.h>
#include <soc/msr.h>
+#include <soc/pm.h>
#include <soc/soc_util.h>
#include <soc/smmrelocate.h>
#include <soc/util.h>
@@ -175,8 +177,11 @@ static void post_mp_init(void)
/* Set Max Ratio */
set_max_turbo_freq();
- if (CONFIG(HAVE_SMI_HANDLER))
+ if (CONFIG(HAVE_SMI_HANDLER)) {
global_smi_enable();
+ if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT)
+ pmc_lock_smi();
+ }
}
static const struct mp_ops mp_ops = {