diff options
| author | Marc Jones <marcjones@sysproconsulting.com> | 2021-04-15 16:25:49 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-04-23 14:52:14 +0000 |
| commit | b20d69462280761ff885177cc925c8126744a082 (patch) | |
| tree | 213d2985f51cd07171e4b909e4133f44fe35a009 /src/soc/intel/xeon_sp/cpx/include | |
| parent | 456b7ba842e05348a8349c81b52d18faae9e42d6 (diff) | |
soc/intel/xeon_sp/cpx: Add UPI locks
Add UPI locks as indicated by the Intel docs.
Change-Id: I9d1336e57f1776f3024883d6edcf0a855b1382c6
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52447
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/include')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h index 0f9a1c31fb..ef918c6d00 100644 --- a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h +++ b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h @@ -124,6 +124,12 @@ #define IMC_M2MEM_TIMEOUT 0x104 #define TIMEOUT_LOCK BIT(1) +/* UPI Devices */ +/* Bus: B(3), Device: 16,14, Function: 3 (LL_CR) */ +#define UPI_LL_CR_DEVID 0x205B +#define UPI_LL_CR_KTIMISCMODLCK 0x300 +#define KTIMISCMODLCK_LOCK BIT(0) + /* CPU Devices */ #define CBDMA_DEV_NUM 0x04 |