diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-05-03 18:37:32 +0200 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-12-09 03:44:41 +0000 |
| commit | 3cc20202de705baf45e58dfecf5937044d0b5c10 (patch) | |
| tree | e8132ae727c5c83da9649acb9538820d85fdb229 /src/soc/intel/xeon_sp/cpx/include | |
| parent | d41f69ccce98808cac536d7d707efecca1706e50 (diff) | |
soc/intel/xeon_sp/cpx: Allow creating meminfo for empty DIMM slots
Introduce the mainboard-defined `mainboard_dimm_slot_exists()` function
to allow creating SMBIOS type 17 entries for unpopulated DIMM slots.
Change-Id: I1d9c41dd7d981842ca6f0294d9e6b0fedc0c98e4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64036
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/include')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/include/soc/ddr.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/ddr.h b/src/soc/intel/xeon_sp/cpx/include/soc/ddr.h index 61a5ebe338..0ef6ded124 100644 --- a/src/soc/intel/xeon_sp/cpx/include/soc/ddr.h +++ b/src/soc/intel/xeon_sp/cpx/include/soc/ddr.h @@ -3,7 +3,7 @@ #ifndef _CPX_DDR_H_ #define _CPX_DDR_H_ -#include <stdint.h> +#include <types.h> /* DDR_*_TCK_MIN are in picoseconds */ #define DDR_800_TCK_MIN 2500 @@ -48,4 +48,6 @@ uint16_t get_max_memory_speed(uint32_t commonTck); uint32_t get_ddr_voltage(uint8_t DdrVoltage); +bool mainboard_dimm_slot_exists(uint8_t socket, uint8_t channel, uint8_t slot); + #endif /* _CPX_DDR_H_ */ |