diff options
| author | Marc Jones <marcjones@sysproconsulting.com> | 2021-04-01 14:47:52 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-16 06:56:13 +0000 |
| commit | 4fad28f4c199bd783fcdfe1b09298f26a28159da (patch) | |
| tree | 6822a2a4358d17cd08c452dbfa9b245e6ee3331d /src/soc/intel/xeon_sp/cpx/chip.c | |
| parent | 352ca5b0313c514b438c4aa518be905a6eff001f (diff) | |
soc/intel/xeon_sp: More PCU locks
Add the following locks as recommended by the Intel docs:
DRAM_POWER_INFO_LOCK
PCU_CR3_FLEX_RATIO_LOCK
TURBO_ACTIVATION_RATIO_LOCK
PCU_CR0_PMAX_LOCK
Change-Id: I8d8211977e87109a91790a4070454fc561aa761b
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52060
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/chip.c')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/chip.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c index a223542a32..500f83e41a 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.c +++ b/src/soc/intel/xeon_sp/cpx/chip.c @@ -121,6 +121,8 @@ static void set_pcu_locks(void) const struct device *cr0_dev = PCU_DEV_CR0(bus); pci_or_config32(cr0_dev, PCU_CR0_P_STATE_LIMITS, P_STATE_LIMITS_LOCK); pci_or_config32(cr0_dev, PCU_CR0_PACKAGE_RAPL_LIMIT_UPR, PKG_PWR_LIM_LOCK_UPR); + pci_or_config32(cr0_dev, PCU_CR0_TURBO_ACTIVATION_RATIO, TURBO_ACTIVATION_RATIO_LOCK); + /* configure PCU_CR1_FUN csrs */ const struct device *cr1_dev = PCU_DEV_CR1(bus); @@ -129,10 +131,12 @@ static void set_pcu_locks(void) /* configure PCU_CR2_FUN csrs */ const struct device *cr2_dev = PCU_DEV_CR2(bus); pci_or_config32(cr2_dev, PCU_CR2_DRAM_PLANE_POWER_LIMIT, PP_PWR_LIM_LOCK); + pci_or_config32(cr2_dev, PCU_CR2_DRAM_POWER_INFO_UPR, DRAM_POWER_INFO_LOCK_UPR); /* configure PCU_CR3_FUN csrs */ const struct device *cr3_dev = PCU_DEV_CR3(bus); pci_or_config32(cr3_dev, PCU_CR3_CONFIG_TDP_CONTROL, TDP_LOCK); + pci_or_config32(cr3_dev, PCU_CR3_FLEX_RATIO, OC_LOCK); } } |