diff options
| author | Jonathan Zhang <jonzhang@meta.com> | 2023-01-23 18:14:53 -0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-09 21:39:17 +0000 |
| commit | ca520a726a6d47c31c5a8c278e2a272b1f89bac4 (patch) | |
| tree | e58fdcdce41799990df27fa4d83ccabe1a3f58a2 /src/soc/intel/xeon_sp/cpx/Makefile.inc | |
| parent | 2285b72d0684f958ab372948d17f2da89db456c7 (diff) | |
soc/intel/xeon_sp: use get_socket_ubox_busno() to hide soc specifics
Intel SPR-SP has its specific way to get the bus number of ubox.
Move the current implementations to CPX-SP and SKX-SP folders.
Change-Id: I2b69be74d140115f9f78bc991fb690e3c90c88db
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72403
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/Makefile.inc')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index 593c339f45..911cf66e4a 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -5,7 +5,7 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y) subdirs-y += ../../../../cpu/intel/turbo subdirs-y += ../../../../cpu/intel/microcode -romstage-y += romstage.c ddr.c +romstage-y += romstage.c ddr.c soc_util.c romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c |