diff options
author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-10-17 15:08:51 +0200 |
---|---|---|
committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-10-28 22:06:29 +0000 |
commit | 3625b0e0eee8a6fff230199c370e5d74579898b2 (patch) | |
tree | 480ccc78ce2a375f8a9e48deb9d93298da9d8ce7 /src/soc/intel/xeon_sp/chip_gen1.c | |
parent | 125194f5fa872c9894197371cc6c693ff278e759 (diff) |
soc/intel/xeon_sp: Add SAD PCI driver
Get rid of some helper functions by properly using a pci_driver.
Configure SAD if necessary and lock SAD if necessary in the newly added
SAD PCI driver. This allows to drop lock_pam0123(), unlock_pam_regions()
and socket0_get_ubox_busno().
- Fixes SAD instance on secondary sockets not decoding the C-F segments
as DRAM, which would prevent those sockets to access the ACPI/SMBIOS
table anchor
- Adds PCI multi segment support
(SKX and CPX only, other were working properly already)
- Moves locking of PAM0123_CSR and PAM456_CSR from SoC to driver code
Change-Id: I167b6ce48631fe3f97359ee33704f52ca854dbd1
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84794
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/chip_gen1.c')
-rw-r--r-- | src/soc/intel/xeon_sp/chip_gen1.c | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/src/soc/intel/xeon_sp/chip_gen1.c b/src/soc/intel/xeon_sp/chip_gen1.c index ee167e2a0e..9737d1138d 100644 --- a/src/soc/intel/xeon_sp/chip_gen1.c +++ b/src/soc/intel/xeon_sp/chip_gen1.c @@ -181,28 +181,3 @@ void create_xeonsp_domains(const union xeon_domain_path dp, struct bus *bus, else if (CONFIG(HAVE_IOAT_DOMAINS) && is_ioat_iio_stack_res(sr)) create_ioat_domains(dp, bus, sr, pci_segment_group); } - -/* - * Route PAM segment access to DRAM - * Only call this code from socket0! - */ -void unlock_pam_regions(void) -{ - uint32_t pam0123_unlock_dram = 0x33333330; - uint32_t pam456_unlock_dram = 0x00333333; - /* Get UBOX(1) for socket0 */ - uint32_t bus1 = socket0_get_ubox_busno(PCU_IIO_STACK); - - /* Assume socket0 owns PCI segment 0 */ - pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), - SAD_ALL_PAM0123_CSR, pam0123_unlock_dram); - pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), - SAD_ALL_PAM456_CSR, pam456_unlock_dram); - - uint32_t reg1 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, - SAD_ALL_FUNC), SAD_ALL_PAM0123_CSR); - uint32_t reg2 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, - SAD_ALL_FUNC), SAD_ALL_PAM456_CSR); - printk(BIOS_DEBUG, "%s:%s pam0123_csr: 0x%x, pam456_csr: 0x%x\n", - __FILE__, __func__, reg1, reg2); -} |