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authorPatrick Rudolph <patrick.rudolph@9elements.com>2024-02-23 09:23:41 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2024-03-06 09:40:13 +0000
commit40e0748ef8a998e9cab61ee676c6c17668d2c059 (patch)
tree088e242a65519a590df800fd5cf15b95022c7da3 /src/soc/intel/xeon_sp/chip_common.c
parent384a9c973c90949e2fd39d07e05e1e9aab3f99b4 (diff)
soc/intel/xeon_sp: Add ACPI names
Set the unused 'name' property of the domain device and store the ACPI name. Every IIO stack can have multiple domain devices, each owning a subset of the available bus range within the stack. The name will be used in future changes to generate ACPI names in SSDT code generation. It can also be used to identify the domain type by looking at the first two characters of the name. Change-Id: Ic4cc81d198fb88300394055682a3954bf22db570 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80792 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/chip_common.c')
-rw-r--r--src/soc/intel/xeon_sp/chip_common.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/src/soc/intel/xeon_sp/chip_common.c b/src/soc/intel/xeon_sp/chip_common.c
index 0c1d52bc86..03ae70af35 100644
--- a/src/soc/intel/xeon_sp/chip_common.c
+++ b/src/soc/intel/xeon_sp/chip_common.c
@@ -2,8 +2,10 @@
#include <assert.h>
#include <console/console.h>
-#include <post.h>
#include <device/pci.h>
+#include <intelblocks/acpi.h>
+#include <post.h>
+#include <soc/acpi.h>
#include <soc/chip_common.h>
#include <soc/soc_util.h>
#include <soc/util.h>
@@ -170,6 +172,9 @@ static struct device_operations iio_pcie_domain_ops = {
.read_resources = iio_pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.scan_bus = iio_pci_domain_scan_bus,
+#if CONFIG(HAVE_ACPI_TABLES)
+ .acpi_name = soc_acpi_name,
+#endif
};
/*
@@ -180,6 +185,9 @@ static struct device_operations ubox_pcie_domain_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.scan_bus = pci_host_bridge_scan_bus,
+#if CONFIG(HAVE_ACPI_TABLES)
+ .acpi_name = soc_acpi_name,
+#endif
};
/*
@@ -194,6 +202,8 @@ static void soc_create_ubox_domains(const union xeon_domain_path dp, struct bus
.domain_path = dp.domain_path
};
+ /* Only expect 2 UBOX buses here */
+ assert(bus_base + 1 == bus_limit);
for (int i = bus_base; i <= bus_limit; i++) {
new_path.bus = i;
@@ -208,6 +218,8 @@ static void soc_create_ubox_domains(const union xeon_domain_path dp, struct bus
die("%s: out of memory.\n", __func__);
domain->ops = &ubox_pcie_domain_ops;
+ const char *prefix = (i == bus_base) ? DOMAIN_TYPE_UBX0 : DOMAIN_TYPE_UBX1;
+ iio_domain_set_acpi_name(domain, prefix);
struct bus *const bus = alloc_bus(domain);
bus->secondary = i;
@@ -226,9 +238,10 @@ void attach_iio_stacks(struct device *dev)
for (int s = 0; s < hob->PlatformData.numofIIO; ++s) {
for (int x = 0; x < MAX_LOGIC_IIO_STACK; ++x) {
- if (s == 0 && x == 0)
+ if (s == 0 && x == 0) {
+ iio_domain_set_acpi_name(dev, DOMAIN_TYPE_PCIE);
continue;
-
+ }
const STACK_RES *ri = &hob->PlatformData.IIO_resource[s].StackRes[x];
if (ri->BusBase > ri->BusLimit)
continue;
@@ -249,6 +262,7 @@ void attach_iio_stacks(struct device *dev)
die("%s: out of memory.\n", __func__);
iio_domain->ops = &iio_pcie_domain_ops;
+ iio_domain_set_acpi_name(iio_domain, DOMAIN_TYPE_PCIE);
} else if (CONFIG(HAVE_IOAT_DOMAINS))
soc_create_ioat_domains(dn, dev->upstream, ri);
}