summaryrefslogtreecommitdiff
path: root/src/soc/intel/xeon_sp/acpi.c
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2022-08-24 14:44:26 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-01-15 13:30:29 +0000
commit550f55e4f63dcb6d16132d2f5596e653fe2d1579 (patch)
treeb345429ab193bf29b6e6c03ecaec10ffe0c63def /src/soc/intel/xeon_sp/acpi.c
parentd873d3a7ec6d39a792fc08bab4f24d7957866609 (diff)
soc/intel/xeon_sp: Redesign resource allocation
The xeon_sp code worked around the coreboot allocator rather than using it. Now the allocator is able to deal with the multiple IIOs so this is not necessary anymore. Instead do the following: - Parse the FSP HOB information about IIO into coreboot PCI domains - Use existing scan_bus and read_resource - Handle IOAT stacks with multiple domains in soc-specific code TEST=intel/archercity CRB Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Nico Huber <nico.h@gmx.de> Signed-off-by: Shuo Liu <shuo.liu@intel.com> Change-Id: Idb29c24b71a18e2e092f9d4953d106e6ca0a5fe1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/acpi.c')
-rw-r--r--src/soc/intel/xeon_sp/acpi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/acpi.c b/src/soc/intel/xeon_sp/acpi.c
index 519d6c7c76..61d51862f5 100644
--- a/src/soc/intel/xeon_sp/acpi.c
+++ b/src/soc/intel/xeon_sp/acpi.c
@@ -104,7 +104,7 @@ size_t soc_get_ioapic_info(const uintptr_t *ioapic_bases[])
for (int stack = 0; stack < MAX_IIO_STACK; ++stack) {
const STACK_RES *ri =
&hob->PlatformData.IIO_resource[socket].StackRes[stack];
- if (!is_iio_stack_res(ri))
+ if (!stack_needs_resource_alloc(ri))
continue;
uint32_t ioapic_base = ri->IoApicBase;
assert(index < ARRAY_SIZE(xeonsp_ioapic_bases));