diff options
author | Shuo Liu <shuo.liu@intel.com> | 2024-03-11 04:56:19 +0800 |
---|---|---|
committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-04-01 08:04:34 +0000 |
commit | 96d7524ee69f07cc54ecf5527953380c8c5f5c48 (patch) | |
tree | a2886987329ceb1989855cd47985891fecc0a267 /src/soc/intel/xeon_sp/Kconfig | |
parent | f2daf2480b8f387bc4e44cb2b4c573da0a8e1b44 (diff) |
intel/common/pch: Add Kconfig SOC_INTEL_COMMON_IBL_BASE
IBL (Integrated Boot Logic) provides a subset of server
PCH logics for no-PCH solution. IBL is with limited features
and registers exposed, PCIe root ports/USB/SATA/LAN support are
removed.
Change-Id: I8f3d64a2dd3b79ec5a9e4306f40b012b00387259
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81314
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/Kconfig')
-rw-r--r-- | src/soc/intel/xeon_sp/Kconfig | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 923527e36c..78227ed4ae 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -2,6 +2,10 @@ source "src/soc/intel/xeon_sp/*/Kconfig" +config XEON_SP_IBL + bool + default n + config XEON_SP_COMMON_BASE bool select ACPI_INTEL_HARDWARE_SLEEP_VALUES @@ -31,9 +35,10 @@ config XEON_SP_COMMON_BASE select SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_TCO - select SOC_INTEL_COMMON_PCH_SERVER select SUPPORT_CPU_UCODE_IN_CBFS select SMM_PCI_RESOURCE_STORE + select SOC_INTEL_COMMON_PCH_SERVER if !XEON_SP_IBL + select SOC_INTEL_COMMON_IBL_BASE if XEON_SP_IBL select TSC_MONOTONIC_TIMER select TPM_STARTUP_IGNORE_POSTINIT if INTEL_TXT select UDELAY_TSC |