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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-01-06 12:28:44 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-08 02:52:02 +0000 |
| commit | 63660592dc50e9a94c60411fb58b6436755eea01 (patch) | |
| tree | 068f3eb57b0450cf668fa88335111c10c8ab4320 /src/soc/intel/tigerlake | |
| parent | c1d1cfa2434621d995cb3150b1b5d2422ebcee97 (diff) | |
soc/intel/xeon_sp: Don't handle FSP reserved memory explicitly
FSP reserved memory is allocated inside cbmem which already gets
marked as a reserved memory region, so there is no need to do this
explicitly.
Change-Id: I39ec70bd9404d7bc2a4228c4364e4cc86f95d7c1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60838
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Diffstat (limited to 'src/soc/intel/tigerlake')
0 files changed, 0 insertions, 0 deletions