diff options
| author | Hung-Te Lin <hungte@chromium.org> | 2021-09-03 15:41:02 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-09-10 13:24:24 +0000 |
| commit | 1fc92dee521e2a8169158b7a7a01d954415854a9 (patch) | |
| tree | e4dc83aec4d657aa2b898aa7cef7ca4ad34579bf /src/soc/intel/tigerlake | |
| parent | 5e8af51d1ec12153b86bc0350143846bcaaee6d3 (diff) | |
mb/google/asurada: enable MIPI_DSI_MODE_LINE_END to fix display issues
The ANX7625 needs explicit LINE_END to output proper
display data.
This patch is based on CB:51435 (commit b923931,
"mb/google/kukui: Add flag for MIPI_DSI_MODE_LINE_END ANX7625")
BUG=b:198558237
TEST=emerge-asurada coreboot
BRANCH=asurada
Change-Id: Id5666fa1bcf96002725509d7436ea1ff5febef93
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57486
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake')
0 files changed, 0 insertions, 0 deletions