diff options
author | Angel Pons <th3fanbus@gmail.com> | 2022-06-26 10:19:53 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-27 13:47:55 +0000 |
commit | 054ff5e9231a05411f660067c6ce33cd67d0896a (patch) | |
tree | d09628f35df44b6f574eaed0063b95bde4292e02 /src/soc/intel/tigerlake | |
parent | 035e31920aa34d5a730869c87ffeb10ccf0ab2db (diff) |
soc/intel/*/Kconfig: Fix typo in comment
clcok ---> clock
Change-Id: Ie41524f6500479162984fa9050d942f4e295f00a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65441
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake')
-rw-r--r-- | src/soc/intel/tigerlake/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index fc77cdef6a..0bf5beefb7 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -215,7 +215,7 @@ config CONSOLE_UART_BASE_ADDRESS depends on INTEL_LPSS_UART_FOR_CONSOLE # Clock divider parameters for 115200 baud rate -# Baudrate = (UART source clcok * M) /(N *16) +# Baudrate = (UART source clock * M) /(N *16) # TGL UART source clock: 120MHz config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL hex |