diff options
author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2021-06-03 17:01:53 +0600 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-14 05:27:39 +0000 |
commit | 18523036829834fe10967c50bc6d60026d6e91b6 (patch) | |
tree | 8aabcce2c5db6fcdd04f8eeaac6bbe6bc9d0b782 /src/soc/intel/tigerlake/spd | |
parent | a85af8ec52e99c72ac0a4f0fb701025f13ffb74e (diff) |
util: Add DDR4 generic SPD for MT40A512M16TB-062E:R
Add SPD support for DDR4 memory part
BUG=b:190020997
TEST=none
Change-Id: I423131cb674e1e5ec699c7a28e5b5e6746247b2a
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55164
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/spd')
-rw-r--r-- | src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt b/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt index 96fb261789..4fdf0dd06b 100644 --- a/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt +++ b/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt @@ -15,3 +15,5 @@ K4AAG165WA-BCTD,ddr4-spd-8.hex H5ANAG6NDMR-XNC,ddr4-spd-2.hex H5ANAG6NCJR-XNC,ddr4-spd-9.hex K4AAG165WB-BCWE,ddr4-spd-9.hex +MT40A1G16RC-062E:B,ddr4-spd-9.hex +MT40A512M16TB-062E:R,ddr4-spd-1.hex |