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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-04-21 13:52:50 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-05-06 04:12:41 +0000 |
| commit | a137201edd37feceb392085b30f82fce3497ff36 (patch) | |
| tree | c9bc3a89521e0e7ece9d0e3cfece3cffcdf47acc /src/soc/intel/tigerlake/p2sb.c | |
| parent | 87b7ec2ebb94d3c3c14c2fd6ec34ad80af950767 (diff) | |
soc/intel/tigerlake: Add known CPU Port IDs for GPIO communities
Change-Id: I97c00e1985f319ff1db57314723d8405c2a6cbd2
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/p2sb.c')
0 files changed, 0 insertions, 0 deletions