diff options
| author | Furquan Shaikh <furquan@google.com> | 2020-05-12 16:25:31 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2020-05-14 15:06:39 +0000 |
| commit | cc35f723fdcc6999ace18eae18467b900a12c07f (patch) | |
| tree | 80ee1d085e1f229b3bbcc5e1ae514a88d113240b /src/soc/intel/tigerlake/include | |
| parent | abd4714ee059b075be5cb94d332602a4ce454bc9 (diff) | |
soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()
This change uses cpu_phys_address_size() to calculate the size of high
MMIO region instead of a macro for each SoC. This ensures that the
entire range above TOUUD that can be addressed by the CPU is used for
MMIO above 4G boundary.
Change-Id: I01a1a86c0c65856f9f35185c2f233c58f18f5dfe
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41347
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake/include')
| -rw-r--r-- | src/soc/intel/tigerlake/include/soc/iomap.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/iomap.h b/src/soc/intel/tigerlake/include/soc/iomap.h index 70f908d57d..282092fade 100644 --- a/src/soc/intel/tigerlake/include/soc/iomap.h +++ b/src/soc/intel/tigerlake/include/soc/iomap.h @@ -76,9 +76,6 @@ #define VTD_BASE_ADDRESS 0xfed90000 #define VTD_BASE_SIZE 0x00004000 -#define ABOVE_4GB_MEM_BASE_SIZE (256ULL * GiB) - - #define MCH_BASE_ADDRESS 0xfedc0000 #define MCH_BASE_SIZE 0x20000 |