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authorVenkata Krishna Nimmagadda <venkata.krishna.nimmagadda@intel.com>2020-05-15 00:13:40 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-06-12 18:40:11 +0000
commite18f71964da7f2eb688c58f8de9d56097ced1cbb (patch)
tree20044b2b948a66d19f337c6ac4b040d6274a8a69 /src/soc/intel/tigerlake/fsp_params.c
parentb75d5743af4c56fca60fc15f830b03ce03e2187d (diff)
soc/intel/tigerlake: Add devicetree support to change PCH VR settings
For Tiger Lake platforms, this patch set provides a way to override PCH external VR settings and ext rail voltage/current through devicetree. This enables setting of optimal settings for FIVRs for a particular PCH type. BUG=None BRANCH=None TEST=Build and boot volteer. Signed-off-by: Venkata Krishna Nimmagadda <venkata.krishna.nimmagadda@intel.com> Change-Id: Ic55472d392f27d153656afbe8692be7e243bb374 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41424 Reviewed-by: Venkata Krishna Nimmagadda <Venkata.krishna.nimmagadda@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/fsp_params.c')
-rw-r--r--src/soc/intel/tigerlake/fsp_params.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index 926d8eb7b4..b9dbec87f5 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -262,6 +262,29 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->ITbtPcieRootPortEn[i] = 0;
}
+ /* PCH FIVR settings override */
+ if (config->ext_fivr_settings.configure_ext_fivr) {
+ params->PchFivrExtV1p05RailEnabledStates =
+ config->ext_fivr_settings.v1p05_enable_bitmap;
+
+ params->PchFivrExtV1p05RailSupportedVoltageStates =
+ config->ext_fivr_settings.v1p05_supported_voltage_bitmap;
+
+ params->PchFivrExtVnnRailEnabledStates =
+ config->ext_fivr_settings.vnn_enable_bitmap;
+
+ params->PchFivrExtVnnRailSupportedVoltageStates =
+ config->ext_fivr_settings.vnn_supported_voltage_bitmap;
+
+ /* convert mV to number of 2.5 mV increments */
+ params->PchFivrExtVnnRailSxVoltage =
+ (config->ext_fivr_settings.vnn_sx_voltage_mv * 10) / 25;
+
+ params->PchFivrExtV1p05RailIccMaximum =
+ config->ext_fivr_settings.v1p05_icc_max_ma;
+
+ }
+
mainboard_silicon_init_params(params);
}