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author | Shuo Liu <shuo.liu@intel.com> | 2023-03-29 20:14:11 +0800 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2024-03-09 23:42:34 +0000 |
commit | 255f9275152f5485e060956295542eb4ee06caa9 (patch) | |
tree | 566e8d2f0cd8fb49af9f263a5841df429e71fe39 /src/soc/intel/tigerlake/bootblock/pch.c | |
parent | 0665d0e2369c07b67e16637ebf4972f8b5aca1ce (diff) |
soc/intel/xeon_sp: Further share domain creation logics in Xeon-SP
With this patch, all domain creation logics are moved into the scope
of attach_iio_stack/chip_common.c for the ease of maintenance
and future SoC integration where the domain creation process for
specific stack types might be overridden.
TEST=intel/archercity CRB
1. Boot to CentOS 9 Stream Cloud.
2. Compare PCIe enumeration and ACPI table generation logs before and
and after this patch, no changes.
Change-Id: If06bb5ff41b5f04cef766cf29d38369c6022da79
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81098
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/bootblock/pch.c')
0 files changed, 0 insertions, 0 deletions