diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-02-04 17:07:14 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-06-29 21:54:17 +0000 |
| commit | ed042a96875082dd889b96843eec2e0b4d9eb092 (patch) | |
| tree | 53bdd6ac23af426256df53ceeeefdc4adff217d7 /src/soc/intel/tigerlake/acpi | |
| parent | 43607e4751d41e57d16f31a8a882a331e5493be1 (diff) | |
soc/intel/tigerlake: Enable support for common IRQ block
Since GPIO IO-APIC IRQs are fixed in hardware (RO registers), this patch
allows tigerlake boards to dynamically assign PCI IRQs. This means not
relying on FSP defaults, which eliminates the problem of PCI IRQs
interfering with GPIO IRQs routed to the same IRQ, when both have
selected IO-APIC routing.
BUG=b:171580862
TEST=on delbin, grep 'IO-APIC' /proc/interrupts (compressed to fit)
0: 6 0 0 0 IO-APIC 2-edge timer
1: 0 35 0 0 IO-APIC 1-edge i8042
8: 0 0 0 0 IO-APIC 8-edge rtc0
9: 0 601 0 0 IO-APIC 9-fasteoi acpi
14: 1 0 0 0 IO-APIC 14-fasteoi INT34C5:00
20: 0 0 0 516 IO-APIC 20-fasteoi idma64.6, ttyS0
28: 0 395 0 0 IO-APIC 28-fasteoi idma64.0, i2c_design
29: 0 0 1654 0 IO-APIC 29-fasteoi idma64.1, i2c_design
30: 0 0 0 0 IO-APIC 30-fasteoi idma64.2, i2c_design
31: 0 0 0 0 IO-APIC 31-fasteoi idma64.3, i2c_design
32: 0 0 0 0 IO-APIC 32-fasteoi idma64.4, i2c_design
33: 0 0 14469 0 IO-APIC 33-fasteoi idma64.5, i2c_design
35: 0 18494 0 0 IO-APIC 35-edge cr50_spi
36: 95705 0 0 0 IO-APIC 36-fasteoi idma64.7, pxa2xx-spi
37: 0 0 1978 0 IO-APIC 37-fasteoi idma64.8, pxa2xx-spi
51: 1865 0 0 0 IO-APIC 51-fasteoi ELAN9008:00
59: 0 0 422 0 IO-APIC 59-fasteoi ELAN0000:00
116: 0 0 0 23 IO-APIC 116-fasteoi chromeos-ec
abbreviated _PRT dump:
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
If (PICM)
Package () {0x0002FFFF, 0x00, 0x00, 0x10},
Package () {0x0004FFFF, 0x00, 0x00, 0x11},
Package () {0x0005FFFF, 0x00, 0x00, 0x12},
Package () {0x0006FFFF, 0x00, 0x00, 0x13},
Package () {0x0007FFFF, 0x00, 0x00, 0x14},
Package () {0x0007FFFF, 0x01, 0x00, 0x15},
Package () {0x0007FFFF, 0x02, 0x00, 0x16},
Package () {0x0007FFFF, 0x03, 0x00, 0x17},
Package () {0x000DFFFF, 0x00, 0x00, 0x10},
Package () {0x000DFFFF, 0x01, 0x00, 0x11},
Package () {0x000DFFFF, 0x02, 0x00, 0x12},
Package () {0x0010FFFF, 0x00, 0x00, 0x13},
Package () {0x0010FFFF, 0x01, 0x00, 0x14},
Package () {0x0011FFFF, 0x00, 0x00, 0x18},
Package () {0x0012FFFF, 0x00, 0x00, 0x19},
Package () {0x0012FFFF, 0x01, 0x00, 0x1A},
Package () {0x0013FFFF, 0x00, 0x00, 0x1B},
Package () {0x0014FFFF, 0x00, 0x00, 0x15},
Package () {0x0015FFFF, 0x00, 0x00, 0x1C},
Package () {0x0015FFFF, 0x01, 0x00, 0x1D},
Package () {0x0015FFFF, 0x02, 0x00, 0x1E},
Package () {0x0015FFFF, 0x03, 0x00, 0x1F},
Package () {0x0016FFFF, 0x00, 0x00, 0x16},
Package () {0x0016FFFF, 0x01, 0x00, 0x17},
Package () {0x0016FFFF, 0x02, 0x00, 0x10},
Package () {0x0016FFFF, 0x03, 0x00, 0x11},
Package () {0x0017FFFF, 0x00, 0x00, 0x12},
Package () {0x0019FFFF, 0x00, 0x00, 0x20},
Package () {0x0019FFFF, 0x01, 0x00, 0x21},
Package () {0x0019FFFF, 0x02, 0x00, 0x22},
Package () {0x001CFFFF, 0x00, 0x00, 0x10},
Package () {0x001CFFFF, 0x01, 0x00, 0x11},
Package () {0x001CFFFF, 0x02, 0x00, 0x12},
Package () {0x001CFFFF, 0x03, 0x00, 0x13},
Package () {0x001DFFFF, 0x00, 0x00, 0x10},
Package () {0x001DFFFF, 0x01, 0x00, 0x11},
Package () {0x001DFFFF, 0x02, 0x00, 0x12},
Package () {0x001DFFFF, 0x03, 0x00, 0x13},
Package () {0x001EFFFF, 0x00, 0x00, 0x14},
Package () {0x001EFFFF, 0x01, 0x00, 0x15},
Package () {0x001EFFFF, 0x02, 0x00, 0x24},
Package () {0x001EFFFF, 0x03, 0x00, 0x25},
Package () {0x001FFFFF, 0x01, 0x00, 0x17},
Package () {0x001FFFFF, 0x02, 0x00, 0x14},
Package () {0x001FFFFF, 0x03, 0x00, 0x15},
Package () {0x001FFFFF, 0x00, 0x00, 0x16},
Else
Package () {0x0002FFFF, 0x00, 0x00, 0x0B},
Package () {0x0004FFFF, 0x00, 0x00, 0x0A},
Package () {0x0005FFFF, 0x00, 0x00, 0x0B},
Package () {0x0006FFFF, 0x00, 0x00, 0x0B},
Package () {0x0007FFFF, 0x00, 0x00, 0x0B},
Package () {0x0007FFFF, 0x01, 0x00, 0x0B},
Package () {0x0007FFFF, 0x02, 0x00, 0x0B},
Package () {0x0007FFFF, 0x03, 0x00, 0x0B},
Package () {0x000DFFFF, 0x00, 0x00, 0x0B},
Package () {0x000DFFFF, 0x01, 0x00, 0x0A},
Package () {0x000DFFFF, 0x02, 0x00, 0x0B},
Package () {0x0010FFFF, 0x00, 0x00, 0x0B},
Package () {0x0010FFFF, 0x01, 0x00, 0x0B},
Package () {0x0014FFFF, 0x00, 0x00, 0x0B},
Package () {0x0016FFFF, 0x00, 0x00, 0x0B},
Package () {0x0016FFFF, 0x01, 0x00, 0x0B},
Package () {0x0016FFFF, 0x02, 0x00, 0x0B},
Package () {0x0016FFFF, 0x03, 0x00, 0x0A},
Package () {0x0017FFFF, 0x00, 0x00, 0x0B},
Package () {0x001CFFFF, 0x00, 0x00, 0x0B},
Package () {0x001CFFFF, 0x01, 0x00, 0x0A},
Package () {0x001CFFFF, 0x02, 0x00, 0x0B},
Package () {0x001CFFFF, 0x03, 0x00, 0x0B},
Package () {0x001DFFFF, 0x00, 0x00, 0x0B},
Package () {0x001DFFFF, 0x01, 0x00, 0x0A},
Package () {0x001DFFFF, 0x02, 0x00, 0x0B},
Package () {0x001DFFFF, 0x03, 0x00, 0x0B},
Package () {0x001EFFFF, 0x00, 0x00, 0x0B},
Package () {0x001EFFFF, 0x01, 0x00, 0x0B},
Package () {0x001FFFFF, 0x01, 0x00, 0x0B},
Package () {0x001FFFFF, 0x02, 0x00, 0x0B},
Package () {0x001FFFFF, 0x03, 0x00, 0x0B},
Package () {0x001FFFFF, 0x00, 0x00, 0x0B},
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ieb241f2b91af52a7e2d0efe997d35732882ac463
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49409
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/acpi')
| -rw-r--r-- | src/soc/intel/tigerlake/acpi/pci_irqs.asl | 159 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/acpi/southbridge.asl | 3 |
2 files changed, 0 insertions, 162 deletions
diff --git a/src/soc/intel/tigerlake/acpi/pci_irqs.asl b/src/soc/intel/tigerlake/acpi/pci_irqs.asl deleted file mode 100644 index 5bb30f001d..0000000000 --- a/src/soc/intel/tigerlake/acpi/pci_irqs.asl +++ /dev/null @@ -1,159 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -Name (PICP, Package () { - /* D31 */ - Package(){0x001FFFFF, 0, 0, 16 }, - /* D30 */ - Package(){0x001EFFFF, 0, 0, 16 }, - Package(){0x001EFFFF, 1, 0, 17 }, - Package(){0x001EFFFF, 2, 0, 36 }, - Package(){0x001EFFFF, 3, 0, 37 }, - /* D29 */ - Package(){0x001DFFFF, 0, 0, 16 }, - Package(){0x001DFFFF, 1, 0, 17 }, - Package(){0x001DFFFF, 2, 0, 18 }, - Package(){0x001DFFFF, 3, 0, 19 }, - /* D28 */ - Package(){0x001CFFFF, 0, 0, 16 }, - Package(){0x001CFFFF, 1, 0, 17 }, - Package(){0x001CFFFF, 2, 0, 18 }, - Package(){0x001CFFFF, 3, 0, 19 }, - /* D25 */ - Package(){0x0019FFFF, 0, 0, 31 }, - Package(){0x0019FFFF, 1, 0, 32 }, - Package(){0x0019FFFF, 2, 0, 33 }, - /* D23 */ - Package(){0x0017FFFF, 0, 0, 16 }, - /* D22 */ - Package(){0x0016FFFF, 0, 0, 16 }, - Package(){0x0016FFFF, 1, 0, 17 }, - Package(){0x0016FFFF, 2, 0, 18 }, - Package(){0x0016FFFF, 3, 0, 19 }, - /* D21 */ - Package(){0x0015FFFF, 0, 0, 27 }, - Package(){0x0015FFFF, 1, 0, 40 }, - Package(){0x0015FFFF, 2, 0, 29 }, - Package(){0x0015FFFF, 3, 0, 30 }, - /* D20 */ - Package(){0x0014FFFF, 0, 0, 16 }, - Package(){0x0014FFFF, 1, 0, 17 }, - /* D19 */ - Package(){0x0013FFFF, 0, 0, 43 }, - Package(){0x0013FFFF, 1, 0, 24 }, - Package(){0x0013FFFF, 2, 0, 25 }, - Package(){0x0013FFFF, 3, 0, 38 }, - /* D18 */ - Package(){0x0012FFFF, 0, 0, 16 }, - Package(){0x0012FFFF, 1, 0, 34 }, - /* D17 */ - Package(){0x0011FFFF, 0, 0, 35 }, - Package(){0x0011FFFF, 1, 0, 20 }, - Package(){0x0011FFFF, 2, 0, 21 }, - Package(){0x0011FFFF, 3, 0, 42 }, - /* D16 */ - Package(){0x0010FFFF, 0, 0, 23 }, - Package(){0x0010FFFF, 1, 0, 22 }, - Package(){0x0010FFFF, 3, 0, 19 }, - /* D13 */ - Package(){0x000DFFFF, 0, 0, 16 }, - Package(){0x000DFFFF, 1, 0, 17 }, - /* D8 */ - Package(){0x0008FFFF, 0, 0, 16 }, - /* D7 */ - Package(){0x0007FFFF, 0, 0, 16 }, - Package(){0x0007FFFF, 1, 0, 17 }, - Package(){0x0007FFFF, 2, 0, 18 }, - Package(){0x0007FFFF, 3, 0, 19 }, - /* D6 */ - Package(){0x0006FFFF, 0, 0, 16 }, - /* D5 */ - Package(){0x0005FFFF, 0, 0, 16 }, - /* D4 */ - Package(){0x0004FFFF, 0, 0, 16 }, - /* D2 */ - Package(){0x0002FFFF, 0, 0, 16 }, -}) - -Name (PICN, Package () { - /* D31 */ - Package(){0x001FFFFF, 0, 0, 11 }, - /* D30 */ - Package(){0x001EFFFF, 0, 0, 11 }, - Package(){0x001EFFFF, 1, 0, 10 }, - Package(){0x001EFFFF, 2, 0, 11 }, - Package(){0x001EFFFF, 3, 0, 11 }, - /* D29 */ - Package(){0x001DFFFF, 0, 0, 11 }, - Package(){0x001DFFFF, 1, 0, 10 }, - Package(){0x001DFFFF, 2, 0, 11 }, - Package(){0x001DFFFF, 3, 0, 11 }, - /* D28 */ - Package(){0x001CFFFF, 0, 0, 11 }, - Package(){0x001CFFFF, 1, 0, 10 }, - Package(){0x001CFFFF, 2, 0, 11 }, - Package(){0x001CFFFF, 3, 0, 11 }, - /* D25 */ - Package(){0x0019FFFF, 0, 0, 11 }, - Package(){0x0019FFFF, 1, 0, 10 }, - Package(){0x0019FFFF, 2, 0, 11 }, - /* D23 */ - Package(){0x0017FFFF, 0, 0, 11 }, - /* D22 */ - Package(){0x0016FFFF, 0, 0, 11 }, - Package(){0x0016FFFF, 1, 0, 10 }, - Package(){0x0016FFFF, 2, 0, 11 }, - Package(){0x0016FFFF, 3, 0, 11 }, - /* D21 */ - Package(){0x0015FFFF, 0, 0, 11 }, - Package(){0x0015FFFF, 1, 0, 10 }, - Package(){0x0015FFFF, 2, 0, 11 }, - Package(){0x0015FFFF, 3, 0, 11 }, - /* D20 */ - Package(){0x0014FFFF, 0, 0, 11 }, - Package(){0x0014FFFF, 0, 0, 10 }, - /* D19 */ - Package(){0x0013FFFF, 0, 0, 11 }, - Package(){0x0013FFFF, 1, 0, 10 }, - Package(){0x0013FFFF, 2, 0, 11 }, - Package(){0x0013FFFF, 3, 0, 11 }, - /* D18 */ - Package(){0x0012FFFF, 0, 0, 11 }, - Package(){0x0012FFFF, 1, 0, 10 },, - /* D18 */ - Package(){0x0011FFFF, 0, 0, 11 }, - Package(){0x0011FFFF, 1, 0, 10 }, - Package(){0x0011FFFF, 2, 0, 11 }, - Package(){0x0011FFFF, 3, 0, 11 }, - /* D16 */ - Package(){0x0010FFFF, 0, 0, 11 }, - Package(){0x0010FFFF, 1, 0, 10 }, - Package(){0x0010FFFF, 2, 0, 11 }, - Package(){0x0010FFFF, 3, 0, 11 }, - /* D13 */ - Package(){0x000DFFFF, 0, 0, 11 }, - Package(){0x000DFFFF, 1, 0, 10 }, - /* D8 */ - Package(){0x0008FFFF, 0, 0, 11 }, - /* D7 */ - Package(){0x0007FFFF, 0, 0, 11 }, - Package(){0x0007FFFF, 1, 0, 10 }, - Package(){0x0007FFFF, 2, 0, 11 }, - Package(){0x0007FFFF, 3, 0, 11 }, - /* D6 */ - Package(){0x0006FFFF, 0, 0, 11 }, - /* D5 */ - Package(){0x0005FFFF, 0, 0, 11 }, - /* D4 */ - Package(){0x0004FFFF, 0, 0, 11 }, - /* D2 */ - Package(){0x0002FFFF, 0, 0, 11 }, -}) - -Method (_PRT) -{ - If (PICM) { - Return (^PICP) - } Else { - Return (^PICN) - } -} diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl index 3a53f2c9d1..59bcf7461f 100644 --- a/src/soc/intel/tigerlake/acpi/southbridge.asl +++ b/src/soc/intel/tigerlake/acpi/southbridge.asl @@ -5,9 +5,6 @@ #include <soc/itss.h> #include <soc/pcr_ids.h> -/* PCI IRQ assignment */ -#include "pci_irqs.asl" - /* PCR access */ #include <soc/intel/common/acpi/pcr.asl> |