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authorCK Hu <ck.hu@mediatek.com>2020-05-13 15:34:14 +0800
committerHung-Te Lin <hungte@chromium.org>2020-09-17 06:56:55 +0000
commit804b3bd10f13aa864c3898f9f215e662f6af6628 (patch)
tree559912f9963eb7bcfa019d9b4b8017242349565b /src/soc/intel/tigerlake/acpi
parentfd3c727ed973137b7f5a30fe28d819148a599afa (diff)
soc/mediatek/mt8192: Init PLL in bootblock
Signed-off-by: CK Hu <ck.hu@mediatek.com> Change-Id: If16d244e07d9f369efd991132587a92e38200b45 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45395 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/acpi')
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