aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/skylake
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2020-09-14 19:04:03 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-19 06:37:37 +0000
commitf463dc0947dd0fbb25e0ffd4a6200b9ed8a3d654 (patch)
treed44aa6ecd64f612a68bbfe5e97ebe88a474ba46c /src/soc/intel/skylake
parente9b937352eec6e5e5b4a7e120f77f15a2732ac03 (diff)
soc/intel/common/block/cse: Refactor cse_request_global_reset() function
List of changes: 1. Check if CSE is enabled from devicetree.cb 2. Create helper function cse_request_reset() 3. Modify caller function argument cse_request_global_reset() Signed-off-by: Subrata Banik <subrata.banik@intel.com> Change-Id: I3668b473bec8d51f847908d11e2e25c485ec7a97 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45341 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/me.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
index 0d6135fabd..b967d31940 100644
--- a/src/soc/intel/skylake/me.c
+++ b/src/soc/intel/skylake/me.c
@@ -353,7 +353,7 @@ int send_global_reset(void)
goto ret;
/* ME should be in Normal Mode for this command */
- status = cse_request_global_reset(GLOBAL_RESET);
+ status = cse_request_global_reset();
ret:
return status;
}