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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-07-01 09:03:51 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-10 21:58:08 +0000 |
| commit | 6c6eb652d5e26831adbba5e39467a5f1f383e802 (patch) | |
| tree | a31a4a9573fd7965b922110a2d2fb8b5216da622 /src/soc/intel/skylake | |
| parent | 46c5f8f1d6d8ba4d3ea292a17b6bab025d543c22 (diff) | |
soc/intel/common: Add Intel Power Engine support to discoverable PMC
In order to get rid of pep.asl, skylake also needs to support runtime
generation of the Intel Power Engine, therefore add this support to
devices that have a discoverable PMC as well.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I4bf0c4a338301b335fa78617e0f2ed5a9f4360ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56013
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
0 files changed, 0 insertions, 0 deletions