diff options
| author | Barnali Sarkar <barnali.sarkar@intel.com> | 2016-08-12 00:05:27 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-14 19:20:55 +0200 |
| commit | 49eca133533a1859764d9faf8cd858c4b87ad21c (patch) | |
| tree | 21d4f6d81d1e168d5315b34b24960536fa4a3686 /src/soc/intel/skylake | |
| parent | 289f0578ce86bac8b0d03efa1244d0b0f8920364 (diff) | |
soc/intel/skylake: Change name pmc_tco_regs to smbus_tco_regs
The function name "pmc_tco_regs" is changed to "smbus_tco_regs"
since TCO offsets belongs to SMBUS PCI device.
BUG=none
BRANCH=none
TEST=Built and booted kunimitsu
Change-Id: I4ac26df81a8221329f2b45053dd5243cd02f8ad7
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/16155
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/finalize.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/pm.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/pmutil.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/pch.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/power_state.c | 2 |
5 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index b37224d5e3..e5b92c6966 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -106,7 +106,7 @@ static void pch_finalize_script(void) write32(spibar + SPIBAR_HSFS, hsfs); /*TCO Lock down */ - tcobase = pmc_tco_regs(); + tcobase = smbus_tco_regs(); tcocnt = inw(tcobase + TCO1_CNT); tcocnt |= TCO_LOCK; outw(tcocnt, tcobase + TCO1_CNT); diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h index d1aa0b4bc8..e0bf8b0c3a 100644 --- a/src/soc/intel/skylake/include/soc/pm.h +++ b/src/soc/intel/skylake/include/soc/pm.h @@ -181,7 +181,7 @@ int acpi_sci_irq(void); /* Get base address PMC memory mapped registers. */ uint8_t *pmc_mmio_regs(void); /* Get base address of TCO I/O registers. */ -uint16_t pmc_tco_regs(void); +uint16_t smbus_tco_regs(void); static inline int deep_s3_enabled(void) { diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c index 0f747348a4..807579d8e0 100644 --- a/src/soc/intel/skylake/pmutil.c +++ b/src/soc/intel/skylake/pmutil.c @@ -218,7 +218,7 @@ static u32 reset_tco_status(void) u16 tco2_sts; u16 tcobase; - tcobase = pmc_tco_regs(); + tcobase = smbus_tco_regs(); /* TCO Status 2 register*/ tco2_sts = inw(tcobase + TCO2_STS); @@ -421,7 +421,7 @@ uint8_t *pmc_mmio_regs(void) return (void *)(uintptr_t)reg32; } -uint16_t pmc_tco_regs(void) +uint16_t smbus_tco_regs(void) { uint16_t reg16; diff --git a/src/soc/intel/skylake/romstage/pch.c b/src/soc/intel/skylake/romstage/pch.c index e8c41cbe81..26677e8200 100644 --- a/src/soc/intel/skylake/romstage/pch.c +++ b/src/soc/intel/skylake/romstage/pch.c @@ -94,7 +94,7 @@ static void pch_device_init(void) pci_write_config32(dev, ACTL, reg32); /* TCO timer halt */ - tcobase = pmc_tco_regs(); + tcobase = smbus_tco_regs(); tcocnt = inw(tcobase + TCO1_CNT); tcocnt |= TCO_TMR_HLT; outw(tcocnt, tcobase + TCO1_CNT); diff --git a/src/soc/intel/skylake/romstage/power_state.c b/src/soc/intel/skylake/romstage/power_state.c index 1305062e5b..61851a587d 100644 --- a/src/soc/intel/skylake/romstage/power_state.c +++ b/src/soc/intel/skylake/romstage/power_state.c @@ -131,7 +131,7 @@ struct chipset_power_state *fill_power_state(void) uint8_t *pmc; struct chipset_power_state *ps = car_get_var_ptr(&power_state); - tcobase = pmc_tco_regs(); + tcobase = smbus_tco_regs(); ps->pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS); ps->pm1_en = inw(ACPI_BASE_ADDRESS + PM1_EN); |