diff options
| author | Duncan Laurie <dlaurie@google.com> | 2019-05-17 14:57:31 -0600 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2019-05-18 20:32:42 +0000 |
| commit | 46340d076a8205946c841dd637db7fd4ebd31b15 (patch) | |
| tree | 6875d441a70fe0c420780f24db48cf82d2eb5031 /src/soc/intel/skylake | |
| parent | 9beb52a17ca2dd574e1bfd734b9af88bf57db328 (diff) | |
soc/intel: Fill DIMM serial number from SPD
Fill the DIMM serial number field for SMBIOS from the saved SPD
data that is returned by FSP.
BUG=b:132970635
TEST=This was tested on sarien to ensure that SMBIOS type 17
filled the serial number from the DIMM:
Handle 0x000B, DMI type 17, 40 bytes
Memory Device
Locator: DIMM-A
Serial Number: 41164beb
Change-Id: I85438bd1d581095ea3482dcf077a7f3389f1cd47
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32853
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 2f75479339..96937d651d 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -126,6 +126,7 @@ static void save_dimm_info(void) src_dimm->DimmId, (const char *)src_dimm->ModulePartNum, sizeof(src_dimm->ModulePartNum), + src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, memory_info_hob->DataWidth); index++; } |