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authorPratik Prajapati <pratikkumar.v.prajapati@intel.com>2017-10-11 16:12:21 -0700
committerAaron Durbin <adurbin@chromium.org>2017-10-20 20:06:33 +0000
commit418535e222ccd9f688facbb7d9663ca4cacc2739 (patch)
tree5e4c9821d6a5366ea130aea43fc0badeaa885ecd /src/soc/intel/skylake
parentd06c7646ac0a191b4320e764bf626982e5facd3e (diff)
soc/intel/skylake: update GNVS with SGX data
- Call sgx_fill_gnvs to update GNVS data, if CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is set. - With this patch SGX ACPI device would get pached with enumaretd values of ECP device status, base address and length Change-Id: Ief0531fbab34838a3f8adb9cdc7d3fe19203c432 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21972 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/acpi.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 387cb6da74..12036617c5 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -32,6 +32,7 @@
#include <ec/google/chromeec/ec.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/lpc_lib.h>
+#include <intelblocks/sgx.h>
#include <soc/intel/common/acpi.h>
#include <soc/acpi.h>
#include <soc/cpu.h>
@@ -200,6 +201,9 @@ static void acpi_create_gnvs(global_nvs_t *gnvs)
/* Set USB2/USB3 wake enable bitmaps. */
gnvs->u2we = config->usb2_wake_enable_bitmap;
gnvs->u3we = config->usb3_wake_enable_bitmap;
+
+ if (IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX))
+ sgx_fill_gnvs(gnvs);
}
unsigned long acpi_fill_mcfg(unsigned long current)