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authorDuncan Laurie <dlaurie@chromium.org>2016-01-28 10:26:31 -0800
committerPatrick Georgi <pgeorgi@google.com>2016-02-09 13:19:48 +0100
commit3cbf8d955f48fc39d5b3087934cbc5739ba07c5a (patch)
tree5a312e76bbc0d2045d089187baffdcb7b7503e0c /src/soc/intel/skylake
parent88b28ada69d032faf37753f0595658d507859d4a (diff)
chromeos: Remove CONFIG_VBNV_SIZE variable
The VBNV region size is determined by vboot and is not really configurable. Only the CMOS implementation defined this config variable so switch it to use VBNV_BLOCK_SIZE defined by vboot in vbnv_layout.h instead. This requires updating the broadwell/skylake cmos reset functions to use the right constant. BUG=chrome-os-partner:47915 BRANCH=glados TEST=manually tested on chell Change-Id: I45e3efc2a22efcb1470bbbefbdae4eda33fc6c96 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e2b803ff3ac30ab22d65d1e62aca623730999a1d Original-Change-Id: I4896a1a5b7889d77ad00c4c8f285d184c4218e17 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/324520 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13598 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/pmc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index a2d88aa8a4..eb7a16036d 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -37,6 +37,7 @@
#include <soc/ramstage.h>
#if IS_ENABLED(CONFIG_CHROMEOS)
#include <vendorcode/google/chromeos/chromeos.h>
+#include <vendorcode/google/chromeos/vbnv_layout.h>
#endif
static const struct reg_script pch_pmc_misc_init_script[] = {
@@ -114,7 +115,7 @@ static void pch_set_acpi_mode(void)
*/
static void pch_cmos_init_preserve(int reset)
{
- uint8_t vbnv[CONFIG_VBNV_SIZE];
+ uint8_t vbnv[VBNV_BLOCK_SIZE];
if (reset)
read_vbnv(vbnv);