diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-11-14 17:51:00 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-16 15:48:04 +0000 |
| commit | 28114ae71bd94c5db17073e1e9a96173331055be (patch) | |
| tree | 6b716fce0c8b59dc40ddbf3d1d6e15211e70c793 /src/soc/intel/skylake | |
| parent | 0acb28a9c08d6bbb769e20f727469e701572cd3a (diff) | |
SMBIOS: Remove duplicated smbios_memory_type enum
Change-Id: I49554d13f1b6371b85a58cc1263608ad9e99130e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29638
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 0945780c9f..eed9d8bef0 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -103,16 +103,16 @@ static void save_dimm_info(void) switch(memory_info_hob->MemoryType) { case MRC_DDR_TYPE_DDR4: - ddr_type = MEMORY_DEVICE_DDR4; + ddr_type = MEMORY_TYPE_DDR4; break; case MRC_DDR_TYPE_DDR3: - ddr_type = MEMORY_DEVICE_DDR3; + ddr_type = MEMORY_TYPE_DDR3; break; case MRC_DDR_TYPE_LPDDR3: - ddr_type = MEMORY_DEVICE_LPDDR3; + ddr_type = MEMORY_TYPE_LPDDR3; break; default: - ddr_type = MEMORY_DEVICE_UNKNOWN; + ddr_type = MEMORY_TYPE_UNKNOWN; break; } |